This application is based upon and claims the benefit of priority from the prior Japanese Patent Applications No. 11-124582, filed Apr. 30, 1999; and No. 2000-049752, filed Feb. 25, 2000, the entire contents of which are incorporated herein by reference.
The present invention relates to a capacitive element driving apparatus for driving a capacitive element such as a piezoelectric member or liquid crystal.
As a capacitive element driving apparatus of this type, a head driving apparatus is disclosed in Jpn. Pat. Appln. KOKAI Publication No. 7-178898, which drives an ink-jet head formed by arraying a plurality of ink chambers with electrodes being connected to capacitive elements such as piezoelectric members. This head driving apparatus drives a share-mode ink-jet head 3 constructed by partitioning ink chambers 11, 12, . . . by piezoelectric members 21, 22, . . . , as shown in FIG. 27. FIG. 28 shows a conventional head driving apparatus 4 for driving the ink-jet head 3.
This head driving apparatus 4 has a serial/parallel converter 5. Outputs from the serial/parallel converter 5 are connected to driving circuits 8 through AND gates 6 and exclusive OR gates 7, respectively. Outputs from the driving circuits 8 are connected to the electrodes of the piezoelectric members 21, 22, . . . provided on the partition walls of the ink chambers 11, 12, . . . through output terminals 9, respectively.
Each driving circuit 8 comprises an input terminal I1, output terminal 9, driving power supply 12, resistors R1 to R5, and bipolar transistors Tr1 to Tr4, as shown in FIG. 29. In this driving circuit 8, when a signal input to the input terminal I1 goes high, the bipolar transistor Tr1 is turned on to output a driving power supply voltage to the output terminal 9. When the input signal goes low, the bipolar transistor Tr2 is turned on to set the output terminal 9 to ground potential.
To control driving the ink-jet head 3 using the driving circuit 8, e.g., to drive an ink chamber 13 and cause it to eject ink, a driving waveform that applies a positive voltage to the ink chamber 13 with respect to the adjacent ink chambers 12 and 14 is applied to the piezoelectric members forming the partition walls between the ink chamber 13 and the ink chambers 12 and 14 for a period Ta to expand the ink chamber 13, as shown in FIG. 30. After that, a driving waveform that applies a positive voltage to the adjacent ink chambers 12 and 14 with respect to the ink chamber 13 is applied for a period Tb to contract the ink chamber 13. When this driving waveform is applied, the interterminal voltage applied to both surfaces of the piezoelectric members that form the partition walls on both sides of the ink chamber 13 abruptly changes from +V to xe2x88x92V, as shown in FIG. 31, so ink is ejected from the ink ejection port of the ink chamber 13.
In this head driving apparatus, to inhibit ink ejection from an ink chamber 16, identical driving waveforms are applied to the ink chamber 16 and ink chambers 15 and 17 adjacent to the ink chamber 16 for the period Tb not to generate a potential difference between the terminals of the piezoelectric members that form the partition walls on both sides of the ink chamber 16, as shown in FIG. 30.
Generally, in a circuit using a bipolar transistor, a MOS (Metal Oxide Semiconductor) transistor is used in place of the bipolar transistor to reduce power consumption. The driving circuit 8 shown in FIG. 29 may also use MOS transistors instead of the bipolar transistors Tr.
However, a driving circuit constructed using PMOS and NMOS transistors in place of the bipolar transistors probably suffers the following problem.
As in the above-described conventional driving circuit, assume that a driving voltage is applied to the piezoelectric members of partition walls on both sides of an ink chamber to be driven to cause it to eject ink from the ink ejection port. When a MOS transistor (low impedance) is turned on, small capacitance components including the junction capacitance of the low-impedance element, the stray capacitance of the driving circuit, and the capacitance of the protective diode are charged/discharged independently of the piezoelectric member as a load.
At this time, since the two electrodes of the piezoelectric member change in the same direction, the piezoelectric member does not act as a load capacitance. Hence, the output voltage steeply changes, and a current with a large peak value and steep leading edge flows. After that, a current corresponding to the charge/discharge of the piezoelectric member flows to the driving circuit and load. Such a current with a large peak value and steep leading edge rises in a sufficiently shorter time than the charge/discharge time of the load.
However, since the charge/discharge time is important for the operation of the piezoelectric member, the short rise time of the first current as described above does not affect the operation of the piezoelectric member. More specifically, the first current with the steep leading edge as described above is wasted by resistive components including the driving circuit, wiring of the head, and the parasitic element of the MOS transistor, and the temperature of the driving elements and head excessively increases.
In addition, the steep current having a large peak value operates the parasitic element of the MOS transistor. This may deteriorate the reliability of the driving element.
The steep change in output voltage also adversely affects a pre-buffer or logic circuit for driving the output element through electrostatic coupling caused by the stray capacitance or the line, resulting in high possibility of operation error.
Even in use of the bipolar transistors Tr, as shown in FIG. 29, when a pulse that goes high during the period Tb, as shown in FIG. 30, is applied to not only ink chambers around an ink chamber to be driven but also all ink chambers that do not eject ink such that no potential difference is generated between the two electrodes of the piezoelectric member, the piezoelectric member (load) is not charged/discharged. Instead, the above-described small capacitance components including the stray capacitance of the driving circuit are charged/discharged in the low-impedance transistor.
More specifically, a current having a small time constant and steep leading and trailing edges (large change in di/dt) flows to the head driving circuit. A large voltage variation of Lxc3x97di/dt is generated by the inductance component of the wiring of the head driving circuit to result in noise. The output voltage rapidly switches accordingly, radiation noise also increases, and an operation error readily occurs.
It is an object of the present invention to provide a reliable and more inexpensive capacitive element driving apparatus having low power consumption, which is capable of suppressing a peak current in charging/discharging small capacitance components present in a circuit or an element independently of a load, and the gradient of an induction voltage generated in an output on the other side to prevent an operation error and noise due to the change in voltage and current, and also suppressing heat generation in the load and driving circuit.
According to an aspect of the present invention, there is provided a capacitive element driving apparatus comprising:
a transducer forming a capacitive load;
electrode potential control means for variably controlling potentials of two electrodes of an electrostatic capacitive element of the transducer; and
impedance control means for, when potentials of the electrodes of the electrostatic capacitive element start changing under the control of the electrode potential control means, controlling an impedance of the electrode potential control means to a high impedance, and while a portion between the electrodes of the electrostatic capacitive element is being charged or discharged, controlling the impedance of the electrode potential control means to a low impedance lower than the high impedance.
According to the present invention, the potentials to be applied to the electrodes of the load are controlled at a high impedance (H) to charge/discharge small capacitance components present in the circuit and elements independently of the load such as a piezoelectric member. After that, the potentials to be applied to the electrodes of the load are controlled at a low impedance (L) to charge/discharge the load such as a piezoelectric member itself. With this operation, the peak current generated in charging/discharging the small capacitance components or the gradient of the leading and trailing edges of the induced voltage generated in the output for controlling the other electrode of the load can be suppressed, and an operation error and noise due to the change in the voltage and current can be prevented. In addition, since heat generation (power consumption) in the load or driving circuit can be suppressed, a highly reliable capacitive element driving apparatus with low power consumption can be provided.
Additional objects and advantages of the invention will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. The objects and advantages of the invention may be realized and obtained by means of the instrumentalities and combinations particularly pointed out hereinafter.